The present invention relates to a charge pump circuit used in a power circuit and the like, and more particularly to a charge pump circuit capable of preventing a parasitic bipolar action and thereby achieving high efficiency and a large current output.
Recently, attention has been given to a step-up power circuit using a charge pump circuit of the Dickson type as a power circuit for mobile equipment, such as a cellular phone. The charge pump circuit of the Dickson type is discussed in detail in, for example, John F. Dickson, xe2x80x9cOn-chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Techniquexe2x80x9d, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-11, NO. 3, pp. 374-378, JUNE, 1976. The step-up charge pump circuit of this type can operate at high frequencies, which makes it possible to reduce the size of an exterior capacitor attached to the outside of the LSI. Hence, it is best applied in downsizing the mobile equipment.
The charge pump circuit, in principle, comprises charge transfer elements in more than one stage connected to a voltage source (Vdd), and each connection node (pumping node) is connected to one end of a corresponding coupling capacitor while a complementary clock is supplied to the other end of each coupling capacitor, so that charge is transferred to the latter stages in succession, thereby ideally obtaining a step-up voltage expressed as: (n+1)xc3x97Vdd, where n represents the number of stages in the charge pump circuit.
Various improvements to the conventional charge pump circuit of the Dickson type has already proposed to provide a charge pump circuit capable of achieving a large output current (several to a dozen mA) and high efficiency in U.S. patent application Ser. No. 09/769,034 filed on Jan. 25, 2001. An example arrangement of this charge pump circuit is depicted in FIGS. 4 through 7. Although the arrangement and operation of this circuit will be described in detail below, the characteristics thereof are as follows.
(1) It is arranged such that when charge transfer MOS transistors (M1, M2, M3, and M4) are ON, a gate-source voltage Vgs in each is twice the power voltage. Hence, not only can the ON resistance of the charge transfer MOS transistors be reduced, but also it is sufficient to design a gate oxide film thick enough to withstand 2 Vdd for all the transistors. Consequently, the ON resistance can be designed lower than in a case where a source-drain voltage Vgs in each charge transfer MOS transistor is unequal.
(2) It is arranged such that a relation, expressed as: a gate-body voltage Vgb=a gate-drain voltage Vgd, is established by short-circuiting the drain and the body. The purpose of this arrangement is to make the gate oxide film thinner by reducing a body bias voltage, and further, to eliminate a rise in the threshold voltage caused by the back gate bias effect.
However, the above-described charge pump circuit has a problem that a bipolar action readily occurs. When a bipolar action does not occur, the circuit efficiency xcex7 is 95%, but once a bipolar action occurs, the circuit efficiency xcex7 drops to as low as 50%. Generally, the circuit efficiency xcex7 is defined as:
xcex7=(output power/input power)xc3x97100. 
The present invention was devised to solve the conventional problems as discussed above, and has an object to provide a charge pump circuit which prevents a bipolar action by eliminating influences from the parasitic inductance.
A charge pump circuit of the present invention is furnished with: a plurality of charge transfer MOS transistors connected in series; coupling capacitors having their one ends respectively connected to connection points of the charge transfer MOS transistors; and clock drivers for alternately supplying clock pulses in anti-phase to the other ends of the coupling capacitors, a predetermined voltage being applied to the charge transfer MOS transistor in a first stage so that a step-up voltage is outputted from the charge transfer MOS transistor in a latter stage, and the charge pump circuit is characterized in that a rising time and a falling time of the clock pulses outputted from the clock drivers are set longer than a time necessary for resonance of outputs from the clock drivers to occur.
The present invention is based on the discovery made first by the inventor of the present invention that one of the factors inducing a bipolar action occurring in a charge pump circuit is a resonance phenomenon of the outputs from the clock drivers. Conventional clock drivers have been chiefly aiming at achieving a large current output, and for this reason, quite a short time is set to the rising time and falling time. Thus, the presence of parasitic inductances and parasitic capacitances causes a bipolar action.
According to the present invention, however, the rising time and falling time of the clock pulses outputted from the clock drivers are set to a larger value than a value at or below which the resonance of the outputs from the clock drivers occurs. Thus, because it is arranged that no resonance phenomenon occurs, a bipolar action induced by the resonance phenomenon can be prevented in a reliable manner, thereby making it possible to prevent deterioration of the circuit efficiency xcex7.